Baker, R. J. (2008). CMOS circuit design, layout, and simulation (Rev. 2nd ed.). IEEE Press.
Dyfyniad Arddull ChicagoBaker, R. Jacob. CMOS Circuit Design, Layout, and Simulation. Rev. 2nd ed. Piscataway, N.J: IEEE Press, 2008.
Dyfyniad MLABaker, R. Jacob. CMOS Circuit Design, Layout, and Simulation. Rev. 2nd ed. IEEE Press, 2008.
Rhybudd: Mae'n bosib nad yw'r dyfyniadau hyn bob amser yn 100% cywir.