Automatic analog IC sizing and optimization constrained with PVT corners and layout effects
| Príomhchruthaitheoirí: | , , |
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| Údar corparáideach: | |
| Formáid: | Electronic Resource |
| Teanga: | Béarla |
| Foilsithe / Cruthaithe: |
Cham
Springer
[2017]
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| Ábhair: | |
| Rochtain ar líne: | Available for University of the Philippines System via SpringerLink. Click here to access Also available remotely for University of the Philippines System via SpringerLink. Click here to access thru EZproxy |