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  1. 1

    BER-aware, PVT-resilient, all-digital BPSK demodulator for energy harvesting sensor nodes by Chua, Adelson Ng

    Published 2014
    Thesis


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  2. 2

    An integration-biased BER-aware design methodology of a BPSK transceiver front-end for power line sensor nodes by Ortiz, Joana Rochelle R.

    Published 2014
    Thesis


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  3. 3

    PVT-aware digital techniques for low-power, 0.5V, on-chip processing unit for the SmartWire node in 65nm CMOS process by Sebastian, Sherry Joy Alvionne

    Published 2014
    Thesis


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  4. 4

    A resilient temperature sensor system for power line monitoring in 65nm CMOS process by Maestro, Rico Jossel Mindoro

    Published 2015
    Thesis


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  5. 5

    Input power range extension using duty-cycling and granularity reduction in a 5.8GHz RF energy harvester dynamic matching circuits by Legaspi, Patrice Abbie D.

    Published 2019
    Thesis


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