Low-power variation-tolerant design in nanometer silicon

Low-Power Variation-Tolerant Design in Nanometer Silicon Edited by: Swarup Bhunia Saibal Mukhopadhyay Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-thresh...

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Bibliographic Details

Corporate Author:	SpringerLink (Online service)
Other Authors:	Bhunia, Swarup, Mukhopadhyay, Saibal
Format:	Electronic Resource
Language:	English
Published:	Boston Springer 2011.
Subjects:	Electronic books. Low voltage integrated circuits. Low voltage integrated circuits > Design and construction.
Online Access:	Available for University of the Philippines Diliman via SpringerLink. Click here to access